Germany - SDRAM (Synchronous Dynamic Random Access Memory)

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Details

Provided by Open Opps
Opportunity closing date
26 October 2020
Opportunity publication date
30 September 2020
Category
30236113: Sy
Value of contract
£100k-1m
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Description

LPDDR4 SDRAM memory BGA 200.
At the Chair of High Parallel VLSI Systems and Neuromicroelectronics at the TU Dresden a special ASIC (Application Specific Integrated Circuit) has been developed, which is the basis for the realization of a larger computer architecture, which is optimized for the simulation of neural networks. ASICs and LPDDR4 SDRAM memory are mounted together on PCB's. Due to design requirements (ensuring cooling in a compact design) and to achieve the lowest possible power consumption, LPDDR4 memory is to be used for mobile applications.The ASIC interface to the LPDDR4 SDRAM was developed as an IP block based on the data sheet of a MT53D512M32D2, a reconfiguration is only possible if the CO ensures that the complete data sheet of the LPDDR4 SDRAM offered by the CO is available to the CL. The aim of the tendered service is the delivery (free place of use) of LPDDR4 SDRAM memories with 16GByte memory capacity and with 2x 16bit interface in a BGA 200 housing.

Opportunity closing date
26 October 2020
Value of contract
£100k-1m

About the buyer

Address
Technische Universität Dresden, Dezernat Finanzen und Beschaffung, Sachgebiet Zentrale Beschaffung und Anlagenbuchhaltung Strehlener Straße 22/24 Dresden 01069 Germany
Contact
beschaffung@tu-dresden.de

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